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| author | Jim Quinlan <jquinlan@broadcom.com> | 2020-09-11 20:52:25 +0300 |
|---|---|---|
| committer | Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> | 2020-09-17 14:30:38 +0300 |
| commit | 04356ac30771091f60e0a45d91bd8027d45c2427 (patch) | |
| tree | c1bd277ba46cbeca5dc28de657438237ffbf63a6 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | 8195b7417018c24b793e2881e9e8bb1d50ace397 (diff) | |
| download | linux-04356ac30771091f60e0a45d91bd8027d45c2427.tar.xz | |
PCI: brcmstb: Add bcm7278 PERST# support
The PERST# bit was moved to a different register in 7278-type STB chips.
In addition, the polarity of the bit was also changed; for other chips
writing a 1 specified assert; for 7278-type chips, writing a 0 specifies
assert. Of course, PERST# is a PCIe asserted-low signal.
While we are here, also change the bridge_sw_init_set() functions so like
the perst_set() functions they are chip specific and we no longer rely on
data wrt chip specific field mask and shift values.
Link: https://lore.kernel.org/r/20200911175232.19016-6-james.quinlan@broadcom.com
Signed-off-by: Jim Quinlan <jquinlan@broadcom.com>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions