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| author | David Jander <david@protonic.nl> | 2024-04-05 10:38:37 +0300 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2024-04-10 08:10:17 +0300 |
| commit | 007bd99669eae90f23817023dc78dbb38e76437d (patch) | |
| tree | 2b0528100652555a51798c6267218dbea7bdc167 /tools/perf/scripts/python/export-to-sqlite.py | |
| parent | 2865b25f5f038ed0b157d3e796def931aca9c0b2 (diff) | |
| download | linux-007bd99669eae90f23817023dc78dbb38e76437d.tar.xz | |
clk: rockchip: rk3568: Add missing USB480M_PHY mux
The USB480M clock can source from a MUX that selects the clock to come
from either of the USB-phy internal 480MHz PLLs. These clocks are
provided by the USB phy driver.
Signed-off-by: David Jander <david@protonic.nl>
Link: https://lore.kernel.org/r/20240404-clk-rockchip-rk3568-add-usb480m-phy-mux-v1-1-e8542afd58b9@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Link: https://lore.kernel.org/r/20240405-clk-rk3568-usb480m-phy-mux-v1-2-6c89de20a6ff@pengutronix.de
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'tools/perf/scripts/python/export-to-sqlite.py')
0 files changed, 0 insertions, 0 deletions