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| author | Peiyang Wang <wangpeiyang1@huawei.com> | 2024-10-25 12:29:30 +0300 |
|---|---|---|
| committer | Paolo Abeni <pabeni@redhat.com> | 2024-10-31 13:15:42 +0300 |
| commit | e6ab19443b36a45ebfb392775cb17d6a78dd07ea (patch) | |
| tree | 429b20d2bc030fcef522c6c41a0c74d92a8210c6 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | 637f41476384c76d3cd7dcf5947caf2c8b8d7a9b (diff) | |
| download | linux-e6ab19443b36a45ebfb392775cb17d6a78dd07ea.tar.xz | |
net: hns3: default enable tx bounce buffer when smmu enabled
The SMMU engine on HIP09 chip has a hardware issue.
SMMU pagetable prefetch features may prefetch and use a invalid PTE
even the PTE is valid at that time. This will cause the device trigger
fake pagefaults. The solution is to avoid prefetching by adding a
SYNC command when smmu mapping a iova. But the performance of nic has a
sharp drop. Then we do this workaround, always enable tx bounce buffer,
avoid mapping/unmapping on TX path.
This issue only affects HNS3, so we always enable
tx bounce buffer when smmu enabled to improve performance.
Fixes: 295ba232a8c3 ("net: hns3: add device version to replace pci revision")
Signed-off-by: Peiyang Wang <wangpeiyang1@huawei.com>
Signed-off-by: Jian Shen <shenjian15@huawei.com>
Signed-off-by: Jijie Shao <shaojijie@huawei.com>
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions