summaryrefslogtreecommitdiff
path: root/tools/perf/scripts/python/export-to-postgresql.py
diff options
context:
space:
mode:
authorArnd Bergmann <arnd@arndb.de>2022-03-08 18:25:36 +0300
committerArnd Bergmann <arnd@arndb.de>2022-03-08 18:25:37 +0300
commitdd5d787f481d999e0f76a82b112e4605fe214541 (patch)
treed3b621691cf4bed1263fb841eee0061d45b9d5b9 /tools/perf/scripts/python/export-to-postgresql.py
parente8f022f9ecb4bb77fb9ab7afc7af03093ee83658 (diff)
parentc8442f0fb09ca3d842b9b23d1d0650f649fd10f8 (diff)
downloadlinux-dd5d787f481d999e0f76a82b112e4605fe214541.tar.xz
Merge tag 'arm-soc/for-5.18/devicetree' of https://github.com/Broadcom/stblinux into arm/dt
This pull request contains Broadcom ARM-based SoCs Device Tree changes for 5.18, please pull the following: - Arinc defines the switch ports of the RTL8365MB switch on the Asus RT-AC88U - Richard provides cache information for the BCM2835/36/37 and BCM2711 SoCs such that tools like "lscpu -C" can report it when supported - Stefan adds support for the Raspberry Pi Zero 2 W (wireless) - Matthew defines the MAC address NVMEM cells for the Cisco Meraki MX64/MX65 devices, he also fixes the LED for these platforms. - Rafal adds the MAC addres NVMEM cell for the Luxul XWR-3150 * tag 'arm-soc/for-5.18/devicetree' of https://github.com/Broadcom/stblinux: ARM: dts: BCM5301X: Add Ethernet MAC address to Luxul XWR-3150 ARM: dts: NSP: MX6X: correct LED function types ARM: dts: NSP: MX6X: get mac-address from eeprom arm64: dts: broadcom: Add reference to RPi Zero 2 W ARM: dts: Add Raspberry Pi Zero 2 W dt-bindings: arm: bcm2835: Add Raspberry Pi Zero 2 W ARM: dts: bcm2835/6: Add the missing L1/L2 cache information ARM: dts: bcm2711: Add the missing L1/L2 cache information ARM: dts: bcm2837: Add the missing L1/L2 cache information ARM: dts: BCM5301X: define RTL8365MB switch on Asus RT-AC88U Link: https://lore.kernel.org/r/20220307194817.3754107-2-f.fainelli@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions