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author | Robert Marko <robert.marko@sartura.hr> | 2024-02-06 20:31:10 +0300 |
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committer | David S. Miller <davem@davemloft.net> | 2024-02-10 18:36:19 +0300 |
commit | d1cb613efbd3cd7d0c000167816beb3f248f5eb8 (patch) | |
tree | d5fe6183c16517428c8537bb429cfd59365bdd7c /tools/perf/scripts/python/export-to-postgresql.py | |
parent | 9b1d5e055508393561e26bd1720f4c2639b03b1a (diff) | |
download | linux-d1cb613efbd3cd7d0c000167816beb3f248f5eb8.tar.xz |
net: phy: qcom: add support for QCA807x PHY Family
This adds driver for the Qualcomm QCA8072 and QCA8075 PHY-s.
They are 2 or 5 port IEEE 802.3 clause 22 compliant 10BASE-Te,
100BASE-TX and 1000BASE-T PHY-s.
They feature 2 SerDes, one for PSGMII or QSGMII connection with
MAC, while second one is SGMII for connection to MAC or fiber.
Both models have a combo port that supports 1000BASE-X and
100BASE-FX fiber.
PHY package can be configured in 3 mode following this table:
First Serdes mode Second Serdes mode
Option 1 PSGMII for copper Disabled
ports 0-4
Option 2 PSGMII for copper 1000BASE-X / 100BASE-FX
ports 0-4
Option 3 QSGMII for copper SGMII for
ports 0-3 copper port 4
Each PHY inside of QCA807x series has 4 digitally controlled
output only pins that natively drive LED-s.
But some vendors used these to driver generic LED-s controlled
by userspace, so lets enable registering each PHY as GPIO
controller and add driver for it.
These are commonly used in Qualcomm IPQ40xx, IPQ60xx and IPQ807x
boards.
Co-developed-by: Christian Marangi <ansuelsmth@gmail.com>
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions