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authorVijaya Krishna Nivarthi <quic_vnivarth@quicinc.com>2022-07-15 21:55:43 +0300
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2022-07-28 11:33:54 +0300
commitc474c775716edd46a51bf8161142bbd1545f8733 (patch)
tree9327dc4c343a690928d793038a9e7d94f28ad30a /tools/perf/scripts/python/export-to-postgresql.py
parentb9f1736e475dba0d6da48fdcb831248ab1597886 (diff)
downloadlinux-c474c775716edd46a51bf8161142bbd1545f8733.tar.xz
tty: serial: qcom-geni-serial: Fix get_clk_div_rate() which otherwise could return a sub-optimal clock rate.
In the logic around call to clk_round_rate(), for some corner conditions, get_clk_div_rate() could return an sub-optimal clock rate. Also, if an exact clock rate was not found lowest clock was being returned. Search for suitable clock rate in 2 steps a) exact match or within 2% tolerance b) within 5% tolerance This also takes care of corner conditions. Fixes: c2194bc999d4 ("tty: serial: qcom-geni-serial: Remove uart frequency table. Instead, find suitable frequency with call to clk_round_rate") Reviewed-by: Douglas Anderson <dianders@chromium.org> Signed-off-by: Vijaya Krishna Nivarthi <quic_vnivarth@quicinc.com> Link: https://lore.kernel.org/r/1657911343-1909-1-git-send-email-quic_vnivarth@quicinc.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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