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authorShun Hao <shunh@nvidia.com>2022-01-17 15:01:12 +0300
committerSaeed Mahameed <saeedm@nvidia.com>2022-03-10 00:33:03 +0300
commitaa818fbf8f36e8c6f3e608ea960567906c2d6112 (patch)
treef457f09cfd35a2abf73582ff16ba9e0fbf92e34f /tools/perf/scripts/python/export-to-postgresql.py
parent32071187e9fb18da62f5be569bd2ea0d7a981ee8 (diff)
downloadlinux-aa818fbf8f36e8c6f3e608ea960567906c2d6112.tar.xz
net/mlx5: DR, Align mlx5dv_dr API vport action with FW behavior
This aligns the behavior with FW when creating an FDB rule with wire vport destination but no source port matching. Until now such rules would fail on internal DR RX rule creation since the source and destination are the wire vport. The new behavior is the same as done on FW steering, if destination is wire, we will create both TX and RX rules, but the RX packet coming from wire will be dropped due to loopback not supported. Signed-off-by: Shun Hao <shunh@nvidia.com> Reviewed-by: Alex Vesker <valex@nvidia.com> Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
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