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| author | Rex Zhu <Rex.Zhu@amd.com> | 2016-11-04 15:35:46 +0300 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2016-11-11 18:21:04 +0300 |
| commit | aa4747c00a2dd034c5fdf70ca73b1674ca15beb3 (patch) | |
| tree | 9e3cc3ab768fc3c1955c5090a06ac2fd26208564 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | dc2f8a9aa98c5983d5faacf7e9843f8d15b5da9c (diff) | |
| download | linux-aa4747c00a2dd034c5fdf70ca73b1674ca15beb3.tar.xz | |
drm/amdgpu: refine uvd_4.2 clock gate sequence.
1. partial revert commit 91db308d6e96.
not set uvd bypass mode.
2. enable uvd cg before initialize uvd.
3. set uvd clock to default value 100MHz.
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions