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| author | Vinod Govindapillai <vinod.govindapillai@intel.com> | 2023-11-11 14:43:20 +0300 |
|---|---|---|
| committer | Mika Kahola <mika.kahola@intel.com> | 2023-11-15 10:40:18 +0300 |
| commit | 8a4353d077788b4efb11beb8c4e3869ea7aeaff7 (patch) | |
| tree | ed9adb02cd30dcc4ad49af42d7589583a2a069ab /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | dd99d5b1ab93e7b731dda3d39cc7caf4639f8652 (diff) | |
| download | linux-8a4353d077788b4efb11beb8c4e3869ea7aeaff7.tar.xz | |
drm/i915/xe2lpd: implement WA for underruns while enabling FBC
FIFO underruns are observed when FBC is enabled on plane 2 or
plane 3. Recommended WA is to update the FBC enabling sequence.
The plane binding register bits need to be updated separately
before programming the FBC enable bit.
Bspec: 74151
Reviewed-by: Mika Kahola <mika.kahola@intel.com> #v3
Signed-off-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Reviewed-by: Mika Kahola <mika.kahola@intel.com>
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20231111114320.87277-2-vinod.govindapillai@intel.com
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
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