diff options
| author | Zhanjun Dong <zhanjun.dong@intel.com> | 2024-11-26 23:10:52 +0300 |
|---|---|---|
| committer | Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> | 2024-12-02 20:13:33 +0300 |
| commit | 6f59fbcfa041e7d69e5e5f39d4c8cffa06fdc50b (patch) | |
| tree | 48c89378b9534fa580ebfd09b995c623fdf4b854 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | 4a69c4fbb8d53e8ace3586f395b1dc98244e4a8c (diff) | |
| download | linux-6f59fbcfa041e7d69e5e5f39d4c8cffa06fdc50b.tar.xz | |
drm/xe/guc: Fix missing init value and add register order check
Fix missing initial value for last_value.
For GuC capture register definition, it is required to define 64bit
register in a pair of 2 consecutive 32bit register entries, low first,
then hi. Add code to check this order.
Changes from prior revs:
v5:- Correct cross-line comment format
v4:- Fix warn on condition and remove skipping
v3:- Move break inside brace
v2:- Correct the fix tag pointed commit
Add examples in comments for warning
Add 1 missing hi condition check
Fixes: ecb633646391 ("drm/xe/guc: Plumb GuC-capture into dev coredump")
Signed-off-by: Zhanjun Dong <zhanjun.dong@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20241126201052.1937079-1-zhanjun.dong@intel.com
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions