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| author | Conor Dooley <conor.dooley@microchip.com> | 2022-09-27 14:19:23 +0300 |
|---|---|---|
| committer | Conor Dooley <conor.dooley@microchip.com> | 2022-09-27 20:53:59 +0300 |
| commit | 6c1193301791d3fcc0ad9ff3b861a8216e00773b (patch) | |
| tree | 26b3a0c7cb357b46be33563cd3b974663b0486f6 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | d49166646e44064b694a2e631fcdba4f814746d9 (diff) | |
| download | linux-6c1193301791d3fcc0ad9ff3b861a8216e00773b.tar.xz | |
riscv: dts: microchip: update memory configuration for v2022.10
In the v2022.10 reference design, the seg registers are going to be
changed, resulting in a required change to the memory map in Linux.
A small 4M reservation is made at the end of 32-bit DDR to provide some
memory for the HSS to use, so that it can cache its payload.bin between
reboots of a specific context.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions