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authorHoward Chiu <howard_chiu@aspeedtech.com>2022-04-01 09:59:06 +0300
committerJoel Stanley <joel@jms.id.au>2022-05-19 06:34:54 +0300
commit4d338ee40ba89e508c5d3e1b4af956af7cb5e12e (patch)
tree9ab2333338d2a21d605104f3f6d17f37894448d6 /tools/perf/scripts/python/export-to-postgresql.py
parent32e62d1beab70d485980013312e747a25c4e13f7 (diff)
downloadlinux-4d338ee40ba89e508c5d3e1b4af956af7cb5e12e.tar.xz
ARM: dts: aspeed: ast2600-evb: Enable RX delay for MAC0/MAC1
Since mac0/1 and mac2/3 are physically located on different die, they have different properties by nature, which is mac0/1 has smaller delay step. The property 'phy-mode' on ast2600 mac0 and mac1 is recommended to set to 'rgmii-rxid' which enables the RX interface delay from the PHY chip. Refer page 45 of SDK User Guide v08.00 https://github.com/AspeedTech-BMC/openbmc/releases/download/v08.00/SDK_User_Guide_v08.00.pdf Fixes: 2ca5646b5c2f ("ARM: dts: aspeed: Add AST2600 and EVB") Signed-off-by: Howard Chiu <howard_chiu@aspeedtech.com> Link: https://lore.kernel.org/r/SG2PR06MB23152A548AAE81140B57DD69E6E09@SG2PR06MB2315.apcprd06.prod.outlook.com Signed-off-by: Joel Stanley <joel@jms.id.au>
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