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| author | Suman Anna <s-anna@ti.com> | 2019-07-25 03:10:18 +0300 |
|---|---|---|
| committer | Tero Kristo <t-kristo@ti.com> | 2019-10-18 12:16:03 +0300 |
| commit | 43570f78a25ca18d09a1455a764ca198e9af9060 (patch) | |
| tree | b166392b40753fbc51eaddba21d2f1b2e95abe62 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | 500f1ff97af9c23bce87dcc7c0e882ee074d33a1 (diff) | |
| download | linux-43570f78a25ca18d09a1455a764ca198e9af9060.tar.xz | |
arm64: dts: ti: k3-am65-base-board: Add IPC sub-mailbox nodes for R5Fs
Add the sub-mailbox nodes that are used to communicate between MPU and
the two R5F remote processors present in the MCU domain to the AM654
EVM base board. These sub-mailbox nodes utilize the System Mailbox
clusters 0 and 1. The interrupts associated with the Mailbox Cluster
User interrupt used by the sub-mailbox nodes are also added. The GIC_SPI
interrupt to be used is dynamically allocated and managed by the System
Firmware through the ti-sci-intr irqchip driver. All the remaining
mailbox clusters are currently not used on A53 core, and so are disabled.
The sub-mailbox nodes added match the hard-coded mailbox configuration
used within the TI RTOS IPC software packages. The Cortex R5F processor
sub-system is assumed to be running in Split mode, so a sub-mailbox node
is used by each of the R5F cores. Only the sub-mailbox node from cluster 0
is used in case of Lockstep mode.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
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