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author | Jean-Philippe Brucker <jean-philippe@linaro.org> | 2020-09-18 13:18:48 +0300 |
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committer | Will Deacon <will@kernel.org> | 2020-09-29 01:48:06 +0300 |
commit | 3f1ce8e85ee06dbe6a8b2e037e9b35f6b32e9ab3 (patch) | |
tree | f2b600a4219ce2e22a38a2892d2d64a4e9266542 /tools/perf/scripts/python/export-to-postgresql.py | |
parent | e881e7839fba8a8452459a656eca90340cc34a2e (diff) | |
download | linux-3f1ce8e85ee06dbe6a8b2e037e9b35f6b32e9ab3.tar.xz |
iommu/arm-smmu-v3: Share process page tables
With Shared Virtual Addressing (SVA), we need to mirror CPU TTBR, TCR,
MAIR and ASIDs in SMMU contexts. Each SMMU has a single ASID space split
into two sets, shared and private. Shared ASIDs correspond to those
obtained from the arch ASID allocator, and private ASIDs are used for
"classic" map/unmap DMA.
A possible conflict happens when trying to use a shared ASID that has
already been allocated for private use by the SMMU driver. This will be
addressed in a later patch by replacing the private ASID. At the
moment we return -EBUSY.
Each mm_struct shared with the SMMU will have a single context
descriptor. Add a refcount to keep track of this. It will be protected
by the global SVA lock.
Introduce a new arm-smmu-v3-sva.c file and the CONFIG_ARM_SMMU_V3_SVA
option to let users opt in SVA support.
Signed-off-by: Jean-Philippe Brucker <jean-philippe@linaro.org>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Link: https://lore.kernel.org/r/20200918101852.582559-9-jean-philippe@linaro.org
Signed-off-by: Will Deacon <will@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
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