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authorJouni Högander <jouni.hogander@intel.com>2025-04-14 13:05:06 +0300
committerJouni Högander <jouni.hogander@intel.com>2025-04-23 12:16:31 +0300
commit39e4d3c2f89ab88450c5aea0477d5c32a7d5502f (patch)
tree66b9e15f240e14688cf433c1ab2fc88c1b66d335 /tools/perf/scripts/python/export-to-postgresql.py
parent2978eb1841cd635f17e568ad74ffa32f68fcd54d (diff)
downloadlinux-39e4d3c2f89ab88450c5aea0477d5c32a7d5502f.tar.xz
drm/i915/psr: Apply underrun on PSR idle workaround
This patch is applying workaround for underrun on idle PSR HW issue (Wa_16025596647) when PSR is getting enabled. It uses vblank enable/disable status, DC5/6 enabled disabled and enabled pipes count information made available. This patch is also adding calls to dc5/dc6, vblank enable/disable and pipe enable/disable notification functions as needed. intel_psr_needs_block_dc_vblank is modified to get vblank enable/disable notification on PSR capable system. v2: use intel_dmc interface instead of directly writing dmc register Bspec: 74151 Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Mika Kahola <mika.kahola@intel.com> Link: https://lore.kernel.org/r/20250414100508.1208774-12-jouni.hogander@intel.com
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