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| author | Dinh Nguyen <dinguyen@kernel.org> | 2022-09-16 04:45:37 +0300 |
|---|---|---|
| committer | Dinh Nguyen <dinguyen@kernel.org> | 2022-11-18 20:13:49 +0300 |
| commit | 31354121bf03dac6498a4236928a38490745d601 (patch) | |
| tree | e83efb74aa6e0753f70752d08434cd1ba672aab2 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | 3b500ff37ce3ef5d7fbb731d082ef8f4cddce0f1 (diff) | |
| download | linux-31354121bf03dac6498a4236928a38490745d601.tar.xz | |
arm64: dts: socfpga: Add clk-phase-sd-hs property to the sdmmc node
The sdmmc controller's CIU(Card Interface Unit) clock's phase can be
adjusted through the register in the system manager. Add the binding
"altr,sysmgr-syscon" to the SDMMC node for the driver to access the
system manager. Add the "clk-phase-sd-hs" property in the SDMMC node to
designate the smpsel and drvsel properties for the CIU clock.
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions