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| author | Biju Das <biju.das.jz@bp.renesas.com> | 2024-12-03 13:49:31 +0300 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2024-12-13 13:02:26 +0300 |
| commit | 25458fdd39a18a5ce00c36f38992da54bb7453f3 (patch) | |
| tree | 6711d43b5643a205431f75a5e79e6e0d77bf30d1 /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | 2bf1a3ca1df7ed93e5ac82ff672753a4edbb6e80 (diff) | |
| download | linux-25458fdd39a18a5ce00c36f38992da54bb7453f3.tar.xz | |
dt-bindings: clock: renesas: Document RZ/G3E SoC CPG
Document the device tree bindings for the Renesas RZ/G3E SoC
Clock Pulse Generator (CPG).
Also define constants for the core clocks of the RZ/G3E SoC.
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20241203105005.103927-5-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
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