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| author | Miquel Raynal <miquel.raynal@bootlin.com> | 2019-10-04 17:27:30 +0300 |
|---|---|---|
| committer | Gregory CLEMENT <gregory.clement@bootlin.com> | 2019-10-09 10:36:41 +0300 |
| commit | 1399672e48b573f6526b9ac78cfd50314f0b01a6 (patch) | |
| tree | 740410e846cf9552b86ed8c3214bfa3dfa5fe8bf /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | 47cf40af64c35a69ef6a193c47768ad1bda29db2 (diff) | |
| download | linux-1399672e48b573f6526b9ac78cfd50314f0b01a6.tar.xz | |
arm64: dts: marvell: Drop PCIe I/O ranges from CP11x file
As an example, Armada 70x0 and 80x0 SoC 0xf9000000 region points to
RUNIT/SPICS0 while it is referenced in the DT as PCIe I/O memory
range. This shows that I/O memory has never been used/working on the
old SoCs despite the region being advertised. As PCIe I/O ranges will
not be supported in newer SoCs using CP11x co-processors, let's
simply drop them. It is not harmful in any case as PCIe device drivers
can do it all with the regular mapped memory anyway.
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions