diff options
| author | Mark Zhang <markzhang@nvidia.com> | 2025-01-19 15:39:46 +0300 |
|---|---|---|
| committer | Leon Romanovsky <leon@kernel.org> | 2025-02-03 14:35:55 +0300 |
| commit | 12d044770e12c4205fa69535b4fa8a9981fea98f (patch) | |
| tree | 1d52ab56062b63b546e58b75f9b4b351b6c689fb /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | d97505baea64d93538b16baf14ce7b8c1fbad746 (diff) | |
| download | linux-12d044770e12c4205fa69535b4fa8a9981fea98f.tar.xz | |
IB/mlx5: Set and get correct qp_num for a DCT QP
When a DCT QP is created on an active lag, it's dctc.port is assigned
in a round-robin way, which is from 1 to dev->lag_port. In this case
when querying this QP, we may get qp_attr.port_num > 2.
Fix this by setting qp->port when modifying a DCT QP, and read port_num
from qp->port instead of dctc.port when querying it.
Fixes: 7c4b1ab9f167 ("IB/mlx5: Add DCT RoCE LAG support")
Signed-off-by: Mark Zhang <markzhang@nvidia.com>
Reviewed-by: Maher Sanalla <msanalla@nvidia.com>
Link: https://patch.msgid.link/94c76bf0adbea997f87ffa27674e0a7118ad92a9.1737290358.git.leon@kernel.org
Signed-off-by: Leon Romanovsky <leon@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions