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author | Geert Uytterhoeven <geert+renesas@glider.be> | 2024-06-20 16:57:37 +0300 |
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committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2024-07-01 12:35:08 +0300 |
commit | 10f9badc473d43ebfddd1ddedbcb8eb3f8f3fdd9 (patch) | |
tree | 89bcd981a2090dd21b3666ce80abe88bd73cf44d /tools/perf/scripts/python/export-to-postgresql.py | |
parent | 2918674704aad620215c41979a331021fe3f1ec4 (diff) | |
download | linux-10f9badc473d43ebfddd1ddedbcb8eb3f8f3fdd9.tar.xz |
arm64: dts: renesas: r9a08g045: Add missing hypervisor virtual timer IRQ
Add the missing fifth interrupt to the device node that represents the
ARM architected timer. While at it, add an interrupt-names property for
clarity,
Fixes: e20396d65b959a65 ("arm64: dts: renesas: Add initial DTSI for RZ/G3S SoC")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Tested-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Link: https://lore.kernel.org/884c683fb6c1d1bf7d0d383a8df8f65a0a424dc7.1718890849.git.geert+renesas@glider.be
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
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