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authorHersen Wu <hersenxs.wu@amd.com>2018-08-21 16:35:47 +0300
committerAlex Deucher <alexander.deucher@amd.com>2018-09-11 06:43:18 +0300
commit0e8e4fbf8d8905071c045f2922de55adbe1a6abe (patch)
tree628d390bf35e2df39a5d614e215d4b6d92ac9b1b /tools/perf/scripts/python/export-to-postgresql.py
parent86a2da705cc29a3a006c6571cadfa45676150622 (diff)
downloadlinux-0e8e4fbf8d8905071c045f2922de55adbe1a6abe.tar.xz
drm/amd/display: num of sw i2c/aux engines less than num of connectors
[why] AMD Stoney reference board, there are only 2 pipes (not include underlay), and 3 connectors. resource creation, only 2 I2C/AUX engines are created. Within dc_link_aux_transfer, when pin_data_en =2, refer to enengines[ddc_pin->pin_data->en] = NULL. NULL point is referred later causing system crash. [how] each asic design has fixed number of ddc engines at hw side. for each ddc engine, create its i2x/aux engine at sw side. Signed-off-by: Hersen Wu <hersenxs.wu@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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