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authorAbe Kohandel <abe.kohandel@intel.com>2023-06-06 17:54:01 +0300
committerMark Brown <broonie@kernel.org>2023-06-06 17:59:16 +0300
commit0760d5d0e9f0c0e2200a0323a61d1995bb745dee (patch)
treeb2c71746db527e0b977da8519bdd7c4e38cefa03 /tools/perf/scripts/python/export-to-postgresql.py
parent8098a931c080d32687aee72a1dfac98507a6034b (diff)
downloadlinux-0760d5d0e9f0c0e2200a0323a61d1995bb745dee.tar.xz
spi: dw: Add compatible for Intel Mount Evans SoC
The Intel Mount Evans SoC's Integrated Management Complex uses the SPI controller for access to a NOR SPI FLASH. However, the SoC doesn't provide a mechanism to override the native chip select signal. This driver doesn't use DMA for memory operations when a chip select override is not provided due to the native chip select timing behavior. As a result no DMA configuration is done for the controller and this configuration is not tested. The controller also has an errata where a full TX FIFO can result in data corruption. The suggested workaround is to never completely fill the FIFO. The TX FIFO has a size of 32 so the fifo_len is set to 31. Signed-off-by: Abe Kohandel <abe.kohandel@intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20230606145402.474866-2-abe.kohandel@intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
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