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| author | Siddharth Vadapalli <s-vadapalli@ti.com> | 2024-05-24 12:23:49 +0300 |
|---|---|---|
| committer | Krzysztof Wilczyński <kwilczynski@kernel.org> | 2024-11-03 22:11:30 +0300 |
| commit | 08e835268c35e851b308f326357224248cfb445b (patch) | |
| tree | c05afc3b72e83e0bb78550f0e9124a6318b8a2f9 /tools/perf/scripts/python/compaction-times.py | |
| parent | 9852d85ec9d492ebef56dc5f229416c925758edc (diff) | |
| download | linux-08e835268c35e851b308f326357224248cfb445b.tar.xz | |
PCI: j721e: Add PCIe support for J722S SoC
TI's J722S SoC has one instance of PCIe namely PCIe0 which is a Gen3
single lane PCIe controller. Add support for the "ti,j722s-pcie-host"
compatible specific to J722S SoC.
Link: https://lore.kernel.org/r/20240524092349.158443-1-s-vadapalli@ti.com
Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/compaction-times.py')
0 files changed, 0 insertions, 0 deletions