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| author | Zhenyu Wang <zhenyuw@linux.intel.com> | 2009-09-19 10:54:06 +0400 |
|---|---|---|
| committer | Jesse Barnes <jbarnes@virtuousgeek.org> | 2009-09-18 01:30:14 +0400 |
| commit | b09aea7fb38f328c02e9f9b79617cabed02455e4 (patch) | |
| tree | aa85ac56e90308aed425eb1a40016639ca8eab13 /tools/perf/scripts/python/check-perf-trace.py | |
| parent | 6f465a8925016633891f5bf030f9c37036529b39 (diff) | |
| download | linux-b09aea7fb38f328c02e9f9b79617cabed02455e4.tar.xz | |
drm/i915: Fix typo for wrong LVDS clock setting on IGDNG
New register for PCH LVDS on IGDNG should be used.
This is a copy-n-paste typo. This fixes possible dual
channel LVDS panel failure on IGDNG.
Cc: Stable Team <stable@kernel.org>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Diffstat (limited to 'tools/perf/scripts/python/check-perf-trace.py')
0 files changed, 0 insertions, 0 deletions