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| author | Arınç ÜNAL <arinc.unal@arinc9.com> | 2024-03-01 13:43:05 +0300 |
|---|---|---|
| committer | Paolo Abeni <pabeni@redhat.com> | 2024-03-05 14:23:43 +0300 |
| commit | b04097c7a7450f7ae172b4a049e8876a85e859be (patch) | |
| tree | 3455fa6332f7224712e47546b99d295332b2e231 /tools/perf/scripts/python/check-perf-trace.py | |
| parent | 6324230b3b675397a5bcabf9bf7b0bd0a7f2ae0a (diff) | |
| download | linux-b04097c7a7450f7ae172b4a049e8876a85e859be.tar.xz | |
net: dsa: mt7530: simplify link operations
The "MT7621 Giga Switch Programming Guide v0.3", "MT7531 Reference Manual
for Development Board v1.0", and "MT7988A Wi-Fi 7 Generation Router
Platform: Datasheet (Open Version) v0.1" documents show that these bits are
enabled at reset:
PMCR_IFG_XMIT(1) (not part of PMCR_LINK_SETTINGS_MASK)
PMCR_MAC_MODE (not part of PMCR_LINK_SETTINGS_MASK)
PMCR_TX_EN
PMCR_RX_EN
PMCR_BACKOFF_EN (not part of PMCR_LINK_SETTINGS_MASK)
PMCR_BACKPR_EN (not part of PMCR_LINK_SETTINGS_MASK)
PMCR_TX_FC_EN
PMCR_RX_FC_EN
These bits also don't exist on the MT7530_PMCR_P(6) register of the switch
on the MT7988 SoC:
PMCR_IFG_XMIT()
PMCR_MAC_MODE
PMCR_BACKOFF_EN
PMCR_BACKPR_EN
Remove the setting of the bits not part of PMCR_LINK_SETTINGS_MASK on
phylink_mac_config as they're already set.
The bit for setting the port on force mode is already done on
mt7530_setup() and mt7531_setup_common(). So get rid of
PMCR_FORCE_MODE_ID() which helped determine which bit to use for the switch
model.
Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
Signed-off-by: Paolo Abeni <pabeni@redhat.com>
Diffstat (limited to 'tools/perf/scripts/python/check-perf-trace.py')
0 files changed, 0 insertions, 0 deletions