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| author | Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> | 2023-10-16 13:53:44 +0300 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2023-11-20 11:19:06 +0300 |
| commit | 993a207c114e137159c8d255576badfcd9defba8 (patch) | |
| tree | d8d6121bf6bd74f917f8f0e4015dfffd6ac74bd8 /tools/perf/scripts/python/check-perf-trace.py | |
| parent | 00cbba479142a3c962a44b127db4ab6cdc2b2b70 (diff) | |
| download | linux-993a207c114e137159c8d255576badfcd9defba8.tar.xz | |
arm64: dts: renesas: rzg3s-smarc: Enable SDHI1
Add SDHI1 to RZ/G3S Smarc Carrier-II board. This is connected to a uSD
interface. Although Vccq doesn't cross the boundary of SoM it has
been added to RZ/G3S Smarc Carrier-II dtsi to have all the bits related to
SDHI1 in a single place. At the moment SoM is used only with RZ/G3S Smarc
Carrier-II board.
Signed-off-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20231016105344.294096-3-claudiu.beznea.uj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'tools/perf/scripts/python/check-perf-trace.py')
0 files changed, 0 insertions, 0 deletions