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| author | Christophe Leroy <christophe.leroy@csgroup.eu> | 2021-10-15 13:02:49 +0300 |
|---|---|---|
| committer | Michael Ellerman <mpe@ellerman.id.au> | 2021-10-22 07:22:03 +0300 |
| commit | 49e3d8ea62482625c3835f0a33ae9c1dda39ea8f (patch) | |
| tree | dc0d9ba234ac3b675efa961b08f84f185bf07567 /tools/perf/scripts/python/check-perf-trace.py | |
| parent | d5970045cf9e266d9a43941ac0866865fd22a36a (diff) | |
| download | linux-49e3d8ea62482625c3835f0a33ae9c1dda39ea8f.tar.xz | |
powerpc/fsl_booke: Enable STRICT_KERNEL_RWX
Enable STRICT_KERNEL_RWX on fsl_booke.
For that, we need additional TLBCAMs dedicated to linear mapping,
based on the alignment of _sinittext.
By default, up to 768 Mbytes of memory are mapped.
It uses 3 TLBCAMs of size 256 Mbytes.
With a data alignment of 16, we need up to 9 TLBCAMs:
16/16/16/16/64/64/64/256/256
With a data alignment of 4, we need up to 12 TLBCAMs:
4/4/4/4/16/16/16/64/64/64/256/256
With a data alignment of 1, we need up to 15 TLBCAMs:
1/1/1/1/4/4/4/16/16/16/64/64/64/256/256
By default, set a 16 Mbytes alignment as a compromise between memory
usage and number of TLBCAMs. This can be adjusted manually when needed.
For the time being, it doens't work when the base is randomised.
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/29f9e5d2bbbc83ae9ca879265426a6278bf4d5bb.1634292136.git.christophe.leroy@csgroup.eu
Diffstat (limited to 'tools/perf/scripts/python/check-perf-trace.py')
0 files changed, 0 insertions, 0 deletions