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| author | Vivien Didelot <vivien.didelot@savoirfairelinux.com> | 2016-07-19 03:45:34 +0300 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2016-07-20 05:42:01 +0300 |
| commit | 3b4caa1b1ce95eaa405c8a27443fe7ddafb563a0 (patch) | |
| tree | ffce44956ea29eba239b488a4c6822fdc37a0af2 /tools/perf/scripts/python/check-perf-trace.py | |
| parent | 47395ed28056a7ac7fbd9e7ff06bbbd66d01e256 (diff) | |
| download | linux-3b4caa1b1ce95eaa405c8a27443fe7ddafb563a0.tar.xz | |
net: dsa: mv88e6xxx: rework Switch MAC setter
Switches such as 88E6185 as 3 Switch MAC registers in Global 1. Newer
chips such as 88E6352 have freed these registers in favor of an indirect
access in a Switch MAC/WoL/WoF register in Global 2.
Explicit this difference with G1 and G2 helpers and flags.
Also, note that this indirect access is a single-register which doesn't
require to wait for the operation to complete (like Switch MAC, Trunk
Mapping, etc.), in contrary to multi-registers indirect accesses with
several operations and a busy bit.
Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'tools/perf/scripts/python/check-perf-trace.py')
0 files changed, 0 insertions, 0 deletions