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| author | Ben Widawsky <ben@bwidawsk.net> | 2012-09-22 03:54:14 +0400 |
|---|---|---|
| committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2012-11-12 02:51:09 +0400 |
| commit | 8693607ae4efe065aa65e26fd6dda8aab7e18ea7 (patch) | |
| tree | 90d4af6ea6cc4d1a6777c07f20b2a4e968bad633 /tools/perf/scripts/python/bin | |
| parent | 17f10fdc010254b8e9c0f1779abdaaee4757cabf (diff) | |
| download | linux-8693607ae4efe065aa65e26fd6dda8aab7e18ea7.tar.xz | |
drm/i915: No LLC_MLC for HSW.
The mid-level cache or as it's more commonly referred to now as L3, is
not setup this way on HSW.
Signed-off-by: Ben Widawsky <ben@bwidawsk.net>
Reviewed-by: Mika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'tools/perf/scripts/python/bin')
0 files changed, 0 insertions, 0 deletions