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| author | Changhuang Liang <changhuang.liang@starfivetech.com> | 2026-04-16 09:47:47 +0300 |
|---|---|---|
| committer | Thomas Gleixner <tglx@kernel.org> | 2026-04-30 13:53:04 +0300 |
| commit | a540d544db1c37d4c138b67384f235a85f79f060 (patch) | |
| tree | 34d6e717512f4e7b0f6623b7bae8c733ad23cdfe /tools/lib/python | |
| parent | d3587cc4a5e691539c46f327f8d510c1bc482b7e (diff) | |
| download | linux-a540d544db1c37d4c138b67384f235a85f79f060.tar.xz | |
dt-bindings: interrupt-controller: Repurpose binding for unreleased jh8100 for jhb100
The StarFive JH8100 SoC was discontinued before production. The newly
taped-out JHB100 SoC uses the same interrupt controller IP.
Rename the binding file, compatible string, and MAINTAINERS entry from
"jh8100" to "jhb100". In JHB100 SoC, The clocks and resets are not operated
by users, but they exist in the hardware. Mark them as optional.
Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
Signed-off-by: Thomas Gleixner <tglx@kernel.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://patch.msgid.link/20260416064751.632138-2-changhuang.liang@starfivetech.com
Diffstat (limited to 'tools/lib/python')
0 files changed, 0 insertions, 0 deletions