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authorKhairul Anuar Romli <khairul.anuar.romli@altera.com>2025-10-15 03:13:38 +0300
committerDinh Nguyen <dinguyen@kernel.org>2025-10-20 18:20:53 +0300
commit2c83769b2f29d6c6b93d1e0f0c23bbd0ce84b241 (patch)
tree81b7230e0dddfaf180d4693d9b1bb526839b835e /tools/lib/python
parent4430d52cd7249fb53756d26ab409caac55ac1537 (diff)
downloadlinux-2c83769b2f29d6c6b93d1e0f0c23bbd0ce84b241.tar.xz
dt-bindings: dma: snps,dw-axi-dmac: Add iommu property
Agilex5 integrates an ARM SMMU v3 (System Memory Management Unit) with dedicated Translation Buffer Units (TBUs) assigned to various peripherals, including the Synopsys DesignWare AXI DMA controller. Each TBU handles address translation for its associated device by mapping stream IDs to memory access permissions and virtual-to-physical address mappings via the SMMU core. The DesignWare AXI DMAC instances on Agilex5 are connected to their respective TBUs. These TBUs forward DMA transactions from the controller through the SMMU, enabling IOMMU-based features such as: - Address translation for DMA operations - Isolation and protection of memory regions accessed by the DMA controller - Support for secure and virtualized environments through enforced access control To support this configuration, the `iommus` property must be added to the binding schema for `snps,dw-axi-dmac`. This allows the device tree to associate each DMA controller with the correct SMMU stream ID, enabling the Linux IOMMU framework to configure translation contexts at runtime. This change documents the IOMMU support for the DMA controller on Agilex5 and allows proper integration with the SMMUv3 hardware. Signed-off-by: Adrian Ng Ho Yin <adrianhoyin.ng@altera.com> Signed-off-by: Khairul Anuar Romli <khairul.anuar.romli@altera.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
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