diff options
| author | Linus Torvalds <torvalds@linux-foundation.org> | 2025-10-18 21:22:07 +0300 | 
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2025-10-18 21:22:07 +0300 | 
| commit | ea0bdf2b945e91137cc465d3833aeb659ba93d79 (patch) | |
| tree | 607026e4d1e8adae55d275ba903b30daf9ada0fd /tools/docs/lib/parse_data_structs.py | |
| parent | 2953fb65481b262514ac13f24ffbc70eeace68c6 (diff) | |
| parent | a4bbb493a3247ef32f6191fd8b2a0657139f8e08 (diff) | |
| download | linux-ea0bdf2b945e91137cc465d3833aeb659ba93d79.tar.xz | |
Merge tag 'cxl-fixes-6.18-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl
Pull Compute Express Link fixes from Dave Jiang:
 "A small collection of CXL fixes. In addition to some misc fixes for
  the CXL subsystem, a number of fixes for CXL extended linear cache
  support are included to make it functional again.
   - Avoid missing port component registers setup due to dport
     enumeration failure
   - Add check for no entries in cxl_feature_info to address accessing
     invalid pointer.
   - Use %pa printk format to emit resource_size_t in
     validate_region_offset()
  CXL extended linear cache support fixes:
   - Fix setup of memory resource in cxl_acpi_set_cache_size()
   - Set range param for region_res_match_cxl_range() as const
     (addresses a compile warning for match_region_by_range() fix)
   - Fix match_region_by_range() to use region_res_match_cxl_range()
   - Subtract to find an hpa_alias0 in cxl_poison events to correct the
     alias math calculation"
* tag 'cxl-fixes-6.18-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl:
  cxl/trace: Subtract to find an hpa_alias0 in cxl_poison events
  cxl/region: Use %pa printk format to emit resource_size_t
  cxl: Fix match_region_by_range() to use region_res_match_cxl_range()
  cxl: Set range param for region_res_match_cxl_range() as const
  cxl/acpi: Fix setup of memory resource in cxl_acpi_set_cache_size()
  cxl/features: Add check for no entries in cxl_feature_info
  cxl/port: Avoid missing port component registers setup
Diffstat (limited to 'tools/docs/lib/parse_data_structs.py')
0 files changed, 0 insertions, 0 deletions
