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| author | Niklas Cassel <cassel@kernel.org> | 2025-06-25 13:23:51 +0300 |
|---|---|---|
| committer | Manivannan Sadhasivam <mani@kernel.org> | 2025-06-25 16:25:58 +0300 |
| commit | 80dc18a0cba8dea42614f021b20a04354b213d86 (patch) | |
| tree | 1a49da38a7711fa0978975f13712b8b9f47847cd /tools/docs/lib/parse_data_structs.py | |
| parent | 15b6b243cc2b1017cf89e2477aa0b4e1a306a82a (diff) | |
| download | linux-80dc18a0cba8dea42614f021b20a04354b213d86.tar.xz | |
PCI: dwc: Ensure that dw_pcie_wait_for_link() waits 100 ms after link up
As per PCIe r6.0, sec 6.6.1, a Downstream Port that supports Link speeds
greater than 5.0 GT/s, software must wait a minimum of 100 ms after Link
training completes before sending a Configuration Request.
Add this delay in dw_pcie_wait_for_link(), after the link is reported as
up. The delay will only be performed in the success case where the link
came up.
DWC glue drivers that have a link up IRQ (drivers that set
use_linkup_irq = true) do not call dw_pcie_wait_for_link(), instead they
perform this delay in their threaded link up IRQ handler.
Signed-off-by: Niklas Cassel <cassel@kernel.org>
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Reviewed-by: Damien Le Moal <dlemoal@kernel.org>
Reviewed-by: Wilfred Mallawa <wilfred.mallawa@wdc.com>
Link: https://patch.msgid.link/20250625102347.1205584-14-cassel@kernel.org
Diffstat (limited to 'tools/docs/lib/parse_data_structs.py')
0 files changed, 0 insertions, 0 deletions