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authorAkshu Agrawal <akshu.agrawal@amd.com>2018-06-21 07:58:17 +0300
committerMark Brown <broonie@kernel.org>2018-06-22 17:48:26 +0300
commit2718c89a233bf8549fdba0925947b2c3cb887a95 (patch)
treee4d27d6ad4f35343bafc7ec6cad3ebbea860a164 /sound/soc/amd/acp.h
parent44fedd7da485bafcc5eee8794fa54cfc0c047dd4 (diff)
downloadlinux-2718c89a233bf8549fdba0925947b2c3cb887a95.tar.xz
ASoC: AMD: Configure channel 1 or channel 0 for capture
ST/CZ SoC have 2 channels for capture in the I2SSP path. The DMA though these channels is done using the same dma descriptors. We configure the channel and enable it on the basis of channel selected by machine driver. Machine driver knows which codec sits on which channel and thus sends the information to dma driver. Signed-off-by: Akshu Agrawal <akshu.agrawal@amd.com> Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/amd/acp.h')
-rw-r--r--sound/soc/amd/acp.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/sound/soc/amd/acp.h b/sound/soc/amd/acp.h
index 9cd3e96c84d4..3190fdce6307 100644
--- a/sound/soc/amd/acp.h
+++ b/sound/soc/amd/acp.h
@@ -55,6 +55,8 @@
#define I2S_SP_INSTANCE 0x01
#define I2S_BT_INSTANCE 0x02
+#define CAP_CHANNEL0 0x00
+#define CAP_CHANNEL1 0x01
#define ACP_TILE_ON_MASK 0x03
#define ACP_TILE_OFF_MASK 0x02
@@ -125,6 +127,7 @@ struct audio_substream_data {
unsigned int order;
u16 num_of_pages;
u16 i2s_instance;
+ u16 capture_channel;
u16 direction;
u16 ch1;
u16 ch2;
@@ -155,6 +158,7 @@ struct audio_drv_data {
*/
struct acp_platform_info {
u16 i2s_instance;
+ u16 capture_channel;
};
union acp_dma_count {