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authorMatt Roper <matthew.d.roper@intel.com>2023-03-25 00:04:12 +0300
committerRodrigo Vivi <rodrigo.vivi@intel.com>2023-12-20 02:30:25 +0300
commit152d7f2db978780f6c7e95711c00dc1e0888535b (patch)
treee319f3f9916b0bf8f904f7eef706cf26dfed8383 /scripts
parent4f843703133970c852cf4661e584bdea55fd1a7a (diff)
downloadlinux-152d7f2db978780f6c7e95711c00dc1e0888535b.tar.xz
drm/xe/pat: Handle unicast vs MCR PAT registers
The PAT_INDEX registers are MCR registers on some platforms and unicast on others. On MTL the handling even varies between GTs: the primary GT uses MCR registers while the media GT uses unicast registers. Let's add proper MCR programming on the relevant platforms/GTs. Given that we PAT tables to change pretty regularly on future platforms, we'll make PAT programming an exception to the usual model of assuming new platforms should inherit the previous platform's behavior. Instead we'll raise a warning if the current platform isn't handled in the if/else ladder. This should help prevent subtle cache misbehavior if we forget to add the table for a new platform. Bspec: 66534, 67609, 67788 Reviewed-by: Nirmoy Das <nirmoy.das@intel.com> Link: https://lore.kernel.org/r/20230324210415.2434992-4-matthew.d.roper@intel.com Signed-off-by: Matt Roper <matthew.d.roper@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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