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authorGrzegorz Nitka <grzegorz.nitka@intel.com>2025-10-17 11:42:28 +0300
committerTony Nguyen <anthony.l.nguyen@intel.com>2026-01-09 20:23:39 +0300
commit2769e6c3a1bdf9b4d0c30809a9e4361ab32ad414 (patch)
tree664ec1ad71f2b9256ac98a99ae7c79f03a070408 /scripts/include
parentfc65403d55c3be44d19e6290e641433201345a5e (diff)
downloadlinux-2769e6c3a1bdf9b4d0c30809a9e4361ab32ad414.tar.xz
ice: unify PHY FW loading status handler for E800 devices
Unify handling of PHY firmware load delays across all E800 family devices. There is an existing mechanism to poll GL_MNG_FWSM_FW_LOADING_M bit of GL_MNG_FWSM register in order to verify whether PHY FW loading completed or not. Previously, this logic was limited to E827 variants only. Also, inform a user of possible delay in initialization process, by dumping informational message in dmesg log ("Link initialization is blocked by PHY FW initialization. Link initialization will continue after PHY FW initialization completes."). Signed-off-by: Grzegorz Nitka <grzegorz.nitka@intel.com> Reviewed-by: Aleksandr Loktionov <aleksandr.loktionov@intel.com> Reviewed-by: Simon Horman <horms@kernel.org> Reviewed-by: Paul Menzel <pmenzel@molgen.mpg.de> Tested-by: Rinitha S <sx.rinitha@intel.com> (A Contingent worker at Intel) Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
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