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| author | Andre Przywara <andre.przywara@arm.com> | 2026-03-27 14:30:05 +0300 |
|---|---|---|
| committer | Linus Walleij <linusw@kernel.org> | 2026-06-11 14:47:52 +0300 |
| commit | 11f25ac56372560762ae1cd6f8880d903f6d5825 (patch) | |
| tree | 304989e0fb5c5a569bf024b888fb4ca5795e2859 /scripts/git.orderFile | |
| parent | eaf84ff673409fa3dfc390c6afb53b641ee5acba (diff) | |
| download | linux-11f25ac56372560762ae1cd6f8880d903f6d5825.tar.xz | |
dt-bindings: pinctrl: sun55i-a523: increase IRQ banks number
The Allwinner A523 SoC implements 10 GPIO banks in the first pinctrl
instance, but it skips the first bank (PortA), so their index goes from
1 to 10. The same is actually true for the IRQ banks: there are registers
for 11 banks, though the first bank is not implemented (RAZ/WI).
In contrast to previous SoCs, the count of the IRQ banks starts with this
first unimplemented bank, so we need to provide an interrupt for it.
And indeed the A523 user manual lists an interrupt number for PortA, so we
need to increase the maximum number of interrupts per pin controller to 11,
to be able to assign the correct interrupt number for each bank.
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Reviewed-by: Chen-Yu Tsai <wens@kernel.org>
Signed-off-by: Linus Walleij <linusw@kernel.org>
Diffstat (limited to 'scripts/git.orderFile')
0 files changed, 0 insertions, 0 deletions
