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| author | Marc Zyngier <maz@kernel.org> | 2023-04-08 19:04:24 +0300 |
|---|---|---|
| committer | Marc Zyngier <maz@kernel.org> | 2023-04-14 10:23:29 +0300 |
| commit | 7e1b2329c205d0a08ebaf3f619318a8a18f36644 (patch) | |
| tree | 860df5432dc2520a90b1f67ede76560dcbb370fe /scripts/generate_rust_analyzer.py | |
| parent | 55b5bac15939dec3cbcbee1f6271bc3a4afd4534 (diff) | |
| download | linux-7e1b2329c205d0a08ebaf3f619318a8a18f36644.tar.xz | |
KVM: arm64: nvhe: Synchronise with page table walker on TLBI
A TLBI from EL2 impacting EL1 involves messing with the EL1&0
translation regime, and the page table walker may still be
performing speculative walks.
Piggyback on the existing DSBs to always have a DSB ISH that
will synchronise all load/store operations that the PTW may
still have.
Reviewed-by: Oliver Upton <oliver.upton@linux.dev>
Signed-off-by: Marc Zyngier <maz@kernel.org>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions