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| author | Ming Yen Hsieh <mingyen.hsieh@mediatek.com> | 2023-10-30 10:17:34 +0300 |
|---|---|---|
| committer | Kalle Valo <kvalo@kernel.org> | 2023-11-08 20:57:19 +0300 |
| commit | 7a934b5cc3f452df6f9a4903450fc103dee98ee8 (patch) | |
| tree | 58bcda6c1a1f49c5ec6a69a0bc1684d387b3ac39 /scripts/generate_rust_analyzer.py | |
| parent | 55c900477f5b3897d9038446f72a281cae0efd86 (diff) | |
| download | linux-7a934b5cc3f452df6f9a4903450fc103dee98ee8.tar.xz | |
wifi: mt76: mt7921: fix 6GHz disabled by the missing default CLC config
No matter CLC is enabled or disabled, the driver should initialize
the default value 0xff for channel configuration of CLC. Otherwise,
the zero value would disable channels.
Reported-and-tested-by: Ben Greear <greearb@candelatech.com>
Closes: https://lore.kernel.org/all/2fb78387-d226-3193-8ca7-90040561b9ad@candelatech.com/
Fixes: 09382d8f8641 ("wifi: mt76: mt7921: update the channel usage when the regd domain changed")
Signed-off-by: Ming Yen Hsieh <mingyen.hsieh@mediatek.com>
Signed-off-by: Deren Wu <deren.wu@mediatek.com>
Signed-off-by: Kalle Valo <kvalo@kernel.org>
Link: https://lore.kernel.org/r/5a976ddf1f636b5cb809373501d3cfdc6d8de3e4.1698648737.git.deren.wu@mediatek.com
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions