diff options
| author | Biju Das <biju.das.jz@bp.renesas.com> | 2022-04-02 10:46:24 +0300 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2022-04-13 13:30:18 +0300 |
| commit | f201eb84450f98decb1834e73409bb2271441dd7 (patch) | |
| tree | 675474ea424415a2df8320754aa66ef832bc9641 /scripts/gdb/linux/utils.py | |
| parent | 6c185664b3d481292c41fbfe66ea19c84cb0237a (diff) | |
| download | linux-f201eb84450f98decb1834e73409bb2271441dd7.tar.xz | |
clk: renesas: r9a07g043: Add ethernet clock sources
Ethernet reference clock can be sourced from PLL5_500 or PLL6. Add
support for ethernet source clock selection using SEL_PLL_6_2 mux.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/20220402074626.25624-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'scripts/gdb/linux/utils.py')
0 files changed, 0 insertions, 0 deletions