diff options
| author | Stephen Boyd <sboyd@kernel.org> | 2022-04-23 05:39:21 +0300 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2022-04-23 05:39:21 +0300 |
| commit | 9f4f53efa986ed5e2e429f8cf534bae174e6822c (patch) | |
| tree | 89ccc4fd387dfa32c507ed096f795b7894e6762e /scripts/gdb/linux/utils.py | |
| parent | 3123109284176b1532874591f7c81f3837bbdc17 (diff) | |
| parent | 59086e4193f4fc920a23d2045a473f62450b4269 (diff) | |
| download | linux-9f4f53efa986ed5e2e429f8cf534bae174e6822c.tar.xz | |
Merge tag 'renesas-clk-for-v5.19-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-renesas
Pull Renesas clk driver updates from Geert Uytterhoeven:
- Add support for the new RZ/G2UL SoC
- Add RPC (QSPI/HyperFlash) clocks on R-Car E3 and D3
- Miscellaneous fixes and improvements
* tag 'renesas-clk-for-v5.19-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
clk: renesas: r9a07g043: Add SDHI clock and reset entries
clk: renesas: r9a07g043: Add GbEthernet clock/reset
clk: renesas: r9a07g043: Add ethernet clock sources
clk: renesas: r9a07g043: Add GPIO clock and reset entries
clk: renesas: Add support for RZ/G2UL SoC
clk: renesas: Move RPC core clocks
clk: renesas: rzg2l: Simplify multiplication/shift logic
dt-bindings: clock: Add R9A07G043 CPG Clock and Reset Definitions
clk: renesas: r8a77995: Add RPC clocks
clk: renesas: r8a77990: Add RPC clocks
dt-bindings: clock: renesas: Document RZ/G2UL SoC
clk: renesas: rzg2l: Remove unused notifiers
Diffstat (limited to 'scripts/gdb/linux/utils.py')
0 files changed, 0 insertions, 0 deletions