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| author | Alexander Stein <alexander.stein@ew.tq-group.com> | 2023-05-10 09:56:41 +0300 |
|---|---|---|
| committer | Abel Vesa <abel.vesa@linaro.org> | 2023-06-12 12:16:09 +0300 |
| commit | 6e6bb1639136f36c82efda147b63e2a2197fa3f8 (patch) | |
| tree | 3598b17f13bd65fa2aee8984bf1a6d6ec67241fe /scripts/gdb/linux/utils.py | |
| parent | 1b280598ab3bd8a2dc8b96a12530d5b1ee7a8f4a (diff) | |
| download | linux-6e6bb1639136f36c82efda147b63e2a2197fa3f8.tar.xz | |
dt-bindings: clock: imx8m: Add missing interrupt property
All i.MX8M SoC have 2 CCM interrupts, called:
* Interrupt Request 1
* Interrupt Request 2
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
Link: https://lore.kernel.org/r/20230510065644.1317577-1-alexander.stein@ew.tq-group.com
Signed-off-by: Abel Vesa <abel.vesa@linaro.org>
Diffstat (limited to 'scripts/gdb/linux/utils.py')
0 files changed, 0 insertions, 0 deletions