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authorThor Thayer <tthayer@opensource.altera.com>2016-03-21 19:01:46 +0300
committerDinh Nguyen <dinguyen@kernel.org>2016-04-11 22:03:08 +0300
commit64ded09d293932621aad94dddf6d14eb0690246a (patch)
tree51870ab79ef8acd25aacaf2f97438d594af66752 /scripts/gdb/linux/utils.py
parent95c16caaa8c1ffff2b58007da3989d7c470069eb (diff)
downloadlinux-64ded09d293932621aad94dddf6d14eb0690246a.tar.xz
ARM: dts: socfpga: Add Altera Arria10 L2 Cache EDAC devicetree entry
Add the device tree entries needed to support the Altera L2 cache EDAC on the Arria10 chip. Signed-off-by: Thor Thayer <tthayer@opensource.altera.com> Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
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