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authorZhenyu Wang <zhenyuw@linux.intel.com>2020-10-30 06:48:17 +0300
committerZhenyu Wang <zhenyuw@linux.intel.com>2020-10-30 06:48:17 +0300
commit4a95857a875e887cc958c92fe9d2cde6184d2ec0 (patch)
tree8d67b681d582ba7ee11a359be7af82ed77bd6620 /scripts/gdb/linux/utils.py
parentbaec997285e63ad3e03d8b8d45e14776cd737f62 (diff)
parent61334ed227a5852100115180f5535b1396ed5227 (diff)
downloadlinux-4a95857a875e887cc958c92fe9d2cde6184d2ec0.tar.xz
Merge tag 'drm-intel-fixes-2020-10-29' into gvt-fixes
Backmerge for 5.10-rc1 to apply one extra APL fix. Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Diffstat (limited to 'scripts/gdb/linux/utils.py')
-rw-r--r--scripts/gdb/linux/utils.py7
1 files changed, 7 insertions, 0 deletions
diff --git a/scripts/gdb/linux/utils.py b/scripts/gdb/linux/utils.py
index ea94221dbd39..ff7c1799d588 100644
--- a/scripts/gdb/linux/utils.py
+++ b/scripts/gdb/linux/utils.py
@@ -123,6 +123,13 @@ def read_u64(buffer, offset):
return read_u32(buffer, offset + 4) + (read_u32(buffer, offset) << 32)
+def read_ulong(buffer, offset):
+ if get_long_type().sizeof == 8:
+ return read_u64(buffer, offset)
+ else:
+ return read_u32(buffer, offset)
+
+
target_arch = None