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| author | Biju Das <biju.das.jz@bp.renesas.com> | 2025-01-15 13:38:51 +0300 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2025-02-03 13:07:06 +0300 |
| commit | 3c437d906f997a4e1495f59773b9a2544fff69ce (patch) | |
| tree | d0ccfd37e6f2d765e6968075ce35169bc13edc2d /scripts/gdb/linux/utils.py | |
| parent | e489f87bc10e8912983d6ae2e1beadbde1d509f8 (diff) | |
| download | linux-3c437d906f997a4e1495f59773b9a2544fff69ce.tar.xz | |
clk: renesas: r9a09g047: Add WDT clocks and resets
WDT0 reset is for CM33. Add WDT[1-3] clock and reset entries.
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Reviewed-by: Tommaso Merciai <tommaso.merciai.xr@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/20250115103858.104709-3-biju.das.jz@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'scripts/gdb/linux/utils.py')
0 files changed, 0 insertions, 0 deletions