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| author | Sander Vanheule <sander@svanheule.net> | 2025-01-19 21:34:21 +0300 |
|---|---|---|
| committer | Thomas Bogendoerfer <tsbogend@alpha.franken.de> | 2025-02-21 17:10:15 +0300 |
| commit | 31e96a0a98978da7b7561ba5eeeef751ffe840d4 (patch) | |
| tree | 14ed0af216eef40d6159e143ba6f40ceffc42caf /scripts/gdb/linux/utils.py | |
| parent | 8e6448164753925c0f3597d95021b45138fbd614 (diff) | |
| download | linux-31e96a0a98978da7b7561ba5eeeef751ffe840d4.tar.xz | |
mips: dts: realtek: Correct uart interrupt-parent
The uart interrupts on RTL838x chips do not lead to the CPU's interrupt
controller directly, but passes via the SoC interrupt controller. Update
the interrupt-parent property to fix this.
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Diffstat (limited to 'scripts/gdb/linux/utils.py')
0 files changed, 0 insertions, 0 deletions