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authorAndy Chiu <andy.chiu@sifive.com>2023-08-16 18:54:49 +0300
committerPalmer Dabbelt <palmer@rivosinc.com>2023-08-22 23:55:12 +0300
commitc35f3aa34509085bfc9800c86bc9998f8954933d (patch)
tree327864578d458b922a5a8a17d2d1ab95ffc90675 /scripts/gdb/linux/tasks.py
parente3f9324b231aba1dc707572bfe80be210c2d4cbd (diff)
downloadlinux-c35f3aa34509085bfc9800c86bc9998f8954933d.tar.xz
RISC-V: vector: export VLENB csr in __sc_riscv_v_state
VLENB is critical for callers of ptrace to reconstruct Vector register files from the register dump of NT_RISCV_VECTOR. Also, future systems may will have a writable VLENB, so add it now to potentially save future compatibility issue. Fixes: 0c59922c769a ("riscv: Add ptrace vector support") Signed-off-by: Andy Chiu <andy.chiu@sifive.com> Link: https://lore.kernel.org/r/20230816155450.26200-3-andy.chiu@sifive.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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