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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2023-10-18 09:16:59 +0300 |
|---|---|---|
| committer | Chanwoo Choi <cw00.choi@samsung.com> | 2023-10-19 14:46:17 +0300 |
| commit | 038ff6f53da07971a9df636bcc9bf1344c468dd5 (patch) | |
| tree | 84f7d29ca167691e3cfd0f61ead87194afae8da7 /scripts/gdb/linux/modules.py | |
| parent | 076b0597f5b6fbec47cddedf9b39d864938a365c (diff) | |
| download | linux-038ff6f53da07971a9df636bcc9bf1344c468dd5.tar.xz | |
PM / devfreq: rockchip-dfi: Handle LPDDR2 correctly
According to the downstream driver the DDRMON_CTRL_LPDDR23 bit must be
set for both LPDDR2 and LPDDR3. Add the missing LPDDR2 case and while
at it turn the if/else if/else into switch/case which makes it easier
to read.
Link: https://lore.kernel.org/all/20231018061714.3553817-12-s.hauer@pengutronix.de/
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Acked-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Diffstat (limited to 'scripts/gdb/linux/modules.py')
0 files changed, 0 insertions, 0 deletions