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| author | Christoph Hellwig <hch@lst.de> | 2023-10-18 08:26:52 +0300 |
|---|---|---|
| committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2023-10-26 10:42:37 +0300 |
| commit | fd962781270e6452dd5b30c8aa0b3b0fbee06244 (patch) | |
| tree | 5350164b36f1dd1ae931ba57706462274e70aa48 /scripts/gdb/linux/interrupts.py | |
| parent | 1531309aa2092a96c092fa662863ffa53da3ba93 (diff) | |
| download | linux-fd962781270e6452dd5b30c8aa0b3b0fbee06244.tar.xz | |
riscv: RISCV_NONSTANDARD_CACHE_OPS shouldn't depend on RISCV_DMA_NONCOHERENT
RISCV_NONSTANDARD_CACHE_OPS is also used for the pmem cache maintenance
helpers, which are built into the kernel unconditionally.
Signed-off-by: Christoph Hellwig <hch@lst.de>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20231018052654.50074-2-hch@lst.de
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'scripts/gdb/linux/interrupts.py')
0 files changed, 0 insertions, 0 deletions