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authorAbel Vesa <abel.vesa@linaro.org>2023-12-07 15:19:15 +0300
committerVinod Koul <vkoul@kernel.org>2023-12-21 20:07:39 +0300
commit762c3565f3c8105603089eeaa0501e5089922221 (patch)
tree1de7fb24dc9fd47c134ae5db5cceeb46b738d71c /scripts/gdb/linux/dmesg.py
parentbc546cc85c1d92d9ba7b278b77016b7d4334fafa (diff)
downloadlinux-762c3565f3c8105603089eeaa0501e5089922221.tar.xz
phy: qcom-qmp: qserdes-txrx: Add V6 N4 register offsets
There is a variant of V6 offsets that are different, the QMP PHY N4, and it is found on the X1E80100 platform. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20231122-phy-qualcomm-v6-v6-20-v7-new-offsets-v3-6-dfd1c375ef61@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
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